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undefined assignment

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This commit is contained in:
Valdemar Høgsvig Lorenzen
2026-06-25 20:37:20 +02:00
parent e0b6f6049c
commit ca6cc89da0
10 changed files with 489 additions and 47 deletions
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compiler/llvm/llvm.odin
+13 -2
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@@ -260,7 +260,7 @@ valid_value :: proc(
.Neg_Checked, .Add_Checked, .Sub_Checked, .Mul_Checked, .Div_Checked, .Pointer_Add, .Not, .Compare, .Call:
return true
case .Address_Global, .Alloca, .Index_Address, .Field_Address, .Orelse_Begin,
.Store, .Trap, .Label, .Br, .Cond_Br, .Return, .Return_Void:
.Store, .Fill, .Trap, .Label, .Br, .Cond_Br, .Return, .Return_Void:
return false
}
return false
@@ -964,6 +964,17 @@ emit_instruction_stream :: proc(
fmt.sbprintf(&emitter.builder, " store %s ", llvm_type(instruction.type, &emitter.module.types))
write_operand(&emitter.builder, instructions, instruction.b, instruction.type, &emitter.module.types)
fmt.sbprintf(&emitter.builder, ", ptr %%v%d\n", instruction.a)
case .Fill:
if !valid_address(instructions, instruction.a, instruction.type, &emitter.module.types) {
emit_recovery_value(emitter, instruction_index, instruction, "invalid fill slot")
continue
}
fmt.sbprintf(
&emitter.builder,
" call void @llvm.memset.p0.i64(ptr %%v%d, i8 -86, i64 %d, i1 false)\n",
instruction.a,
types.size(instruction.type, &emitter.module.types, emitter.module.target),
)
case .Slice:
if !valid_instruction(instructions, instruction.a) {
emit_recovery_value(emitter, instruction_index, instruction, "invalid slice container")
@@ -1990,7 +2001,7 @@ emit_messages :: proc(emitter: ^Emitter) {
}
emit_declarations :: proc(emitter: ^Emitter) {
strings.write_string(&emitter.builder, "declare i64 @write(i32, ptr, i64)\ndeclare void @llvm.trap()\ndeclare void @llvm.memcpy.p0.p0.i64(ptr, ptr, i64, i1 immarg)\n")
strings.write_string(&emitter.builder, "declare i64 @write(i32, ptr, i64)\ndeclare void @llvm.trap()\ndeclare void @llvm.memcpy.p0.p0.i64(ptr, ptr, i64, i1 immarg)\ndeclare void @llvm.memset.p0.i64(ptr, i8, i64, i1 immarg)\n")
widths := [?]int{8, 16, 32, 64}
overflow_intrinsics := [?]string{"sadd", "uadd", "ssub", "usub", "smul", "umul"}
for bits in widths {